Research

My area of interest is the automated implementation of algorithms to dedicated digital hardware devices and field custom configurable machines.

High-performance algorithms have been shown to achieve great performance improvements when implemented to dedicated hardware, e.g. FPGAs and ASICs. Sometimes the size and composition of some of these algorithms requires more resources than a single device can provide. In these situations, the algorithm can be implemented to a platform consisting of multiple devices. The task of partitioning the algorithm into tasks to assign to each of the devices becomes critical to the system's performance.

My research focuses on the partitioning of discrete signal transforms. e.g. the discrete Fourier and cosine transforms, onto distributed hardware architectures. We use high-level features and characteristics of these transforms to improve solution space exploration and partitioning results.

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MindSource International: Best in IT business consulting and research.
SPIRAL project: Carnegie Mellon University
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